Programmable logic switches are used in field programmable gate arrays (FPGAs) and other elements, in which logical operation circuits and wiring circuits need reconfiguration. The programmable switches are turned ON and OFF based on data stored in memories. The memories have conventionally been volatile memories such as static random access memories (SRAMs), in which data is erased when power is turned OFF, and rewritten when power is turned ON again.
Switch block (SB) circuits, which are components of FPGAs, also employ SRAMs to store wiring information. Generally, a switch block circuit connects one of a first group of wiring lines arranged in parallel with one of a second group of wiring lines arranged to cross the first group of wiring lines. Diagonally arranged switch block circuits each having this structure may arbitrarily change the signal paths from one direction to another direction.
The switch block circuits may be applied to multi-input multi-output multiplexers (MUXs) with memories located at intersections of wiring lines. In this circuit configuration, elements may be densely arranged. Therefore the circuit configuration is effective to reduce the area. Using one time programmable (OTP) elements or resistive change elements in memories that store switching information would also help achieve dense arrangements. Regardless of whether OTP elements or resistive change elements are used, the wiring capacitance increases as the number of input lines and output lines increases, which also leads to an increase in the delay time.